CVE-2026-29645: NEMU RISC-V Vector Decoder DOS Vulnerability

CVE-2026-29645 Overview

CVE-2026-29645 is an improper instruction-validation flaw discovered in NEMU (OpenXiangShan/NEMU), an open-source RISC-V emulator. The vulnerability exists in the RISC-V Vector (RVV) decoder, which fails to properly validate the funct3 field when decoding vsetvli, vsetivli, and vsetvl instructions. This improper validation allows attackers to craft malicious RISC-V binaries containing invalid OP-V instruction encodings that are incorrectly interpreted and executed as vset* configuration instructions, rather than raising the expected illegal-instruction exception.

Critical Impact

Exploitation of this vulnerability can lead to incorrect trap behavior, architectural state corruption, execution divergence, and denial of service in systems relying on NEMU for correct execution or sandboxing environments.

Affected Products

• NEMU (OpenXiangShan/NEMU) versions before v2025.12.r2

Discovery Timeline

• 2026-04-20 - CVE-2026-29645 published to NVD
• 2026-04-21 - Last updated in NVD database

Technical Details for CVE-2026-29645

Vulnerability Analysis

This vulnerability stems from incomplete input validation in the RISC-V Vector extension instruction decoder within NEMU. The RISC-V Vector extension defines specific encoding rules for vector configuration instructions (vsetvli, vsetivli, vsetvl), which use the funct3 field to distinguish between instruction variants. The vulnerable decoder implementation fails to verify that the funct3 field contains valid values according to the RISC-V specification.

When processing OP-V (Vector Operations) encoded instructions, the decoder should validate that the instruction encoding conforms to the expected format. However, due to the missing validation check, certain malformed instruction encodings that should trigger an illegal-instruction exception are instead decoded and executed as legitimate vector configuration instructions. This represents a deviation from the correct architectural behavior specified in the RISC-V Unprivileged V-Instruction Extension.

The vulnerability is classified under CWE-131 (Incorrect Calculation of Buffer Size), though in this context it manifests as an input validation error in instruction decoding logic.

Root Cause

The root cause lies in the instruction decoder's failure to implement complete boundary checking for the funct3 field during the decoding of vector configuration instructions. The decoder logic incorrectly assumes that any OP-V encoded instruction with certain opcode patterns is a valid vset* instruction without verifying the funct3 field against the specification-defined valid values. This oversight allows invalid instruction encodings to bypass the expected illegal-instruction trap mechanism.

Attack Vector

An attacker can exploit this vulnerability by providing specially crafted RISC-V binaries to a system running NEMU. The attack does not require authentication and can be performed remotely in scenarios where NEMU processes untrusted binary input. The attack flow involves:

1. Crafting a RISC-V binary containing malformed OP-V instruction encodings with invalid funct3 field values
2. Submitting the malicious binary to a system using NEMU for emulation, simulation, or sandboxing
3. The vulnerable decoder misinterprets the invalid instructions as vset* configuration instructions
4. This leads to incorrect architectural state modification, trap behavior divergence, or denial of service

The vulnerability is particularly concerning for environments using NEMU as a reference implementation for hardware verification, as it can cause execution divergence between the emulator and actual hardware implementations.

Detection Methods for CVE-2026-29645

Indicators of Compromise

• Unusual RISC-V binary inputs containing non-standard OP-V instruction encodings
• Unexpected vector register state modifications during emulation sessions
• Missing illegal-instruction exceptions when processing malformed vector instructions
• Divergence between NEMU execution results and hardware or other reference implementations

Detection Strategies

• Implement input validation for RISC-V binaries before processing with NEMU, checking for known malformed instruction patterns
• Monitor NEMU execution logs for unexpected instruction decoding behavior or missing trap events
• Deploy integrity monitoring on systems using NEMU to detect unauthorized binary submissions
• Compare NEMU execution traces against reference implementations for critical workloads

Monitoring Recommendations

• Enable verbose logging in NEMU to capture instruction decoding events and exception handling
• Implement alerting for denial of service conditions in NEMU-based emulation environments
• Track NEMU process stability and resource consumption for anomalous patterns
• Audit all binary inputs processed by NEMU in sandboxing or verification environments

How to Mitigate CVE-2026-29645

Immediate Actions Required

• Update NEMU to version v2025.12.r2 or later immediately
• Review any emulation or simulation results generated by vulnerable NEMU versions for potential corruption
• Restrict access to NEMU instances processing untrusted binary input
• Implement input validation for RISC-V binaries in upstream processing pipelines

Patch Information

The vulnerability has been addressed by the OpenXiangShan team. The fix adds proper validation of the funct3 field in the RISC-V Vector decoder to ensure invalid instruction encodings correctly raise illegal-instruction exceptions as specified. The patch details are available in the GitHub NEMU Commit and the associated Pull Request #958. Additional context and discussion can be found in Issue #952.

Organizations should update to NEMU version v2025.12.r2 or apply the referenced commit to their NEMU installations.

Workarounds

• Restrict NEMU usage to trusted RISC-V binaries only until the patch can be applied
• Implement pre-processing validation of RISC-V binaries to detect and reject malformed OP-V instruction encodings
• Run NEMU in isolated environments with limited privileges to contain potential denial of service impact
• Consider using alternative RISC-V emulators for processing untrusted binaries until NEMU is patched